FPGA implementation of Convolution algorithm for Image Processing

The multidisciplinary field of digital image processing has experienced a tremendous growth over the past decade. Many image processing operations such as scaling and rotation require re-sampling or convolution filtering for each pixel in the image. Convolutions on digital images are important since they represent operations that are more general than the operations that can be performed on analog images. Filtering of signals is very important in order to determine which one to accept and which one to reject, and all of that is done by convolution. Image processing tasks such as filtering, stereo correspondence and feature detection are inherently highly parallelisable. The use of FPGAs (Field Programmable Gate Arrays), which can be operated in highly parallel configurations, can thus be a useful approach in imaging applications. FPGA is a reconfigurable device used to place some or all of the system onto the hardware. They allow rapid prototyping of a system and offer an inexpensive option to validate system requirements.

Mohassin Ahmad is a postgraduate in Electronics and Communication and is persuing her PhD at National Institute of Technology, Srinagar, India. her area of research is VLSI, Harware implementation, FPGA, Image Processing.